发明名称 Error detection system for a data processing apparatus.
摘要 <p>Data processing apparatus includes a number of units (10, 16) connected by a bus (11) over which each unit can send public write messages to all the other units in parallel. The units are connected in a loop by means of public write acceptance lines (18). Whenever a unit receives a public write message it sends an acceptance signal to the next unit in the loop. Each unit produces an error signal if it receives a public write message but does not receive any corresponding acceptance signal, or if it receives an acceptance signal without having received a corresponding public write message. Thus, each unit checks its neighbours in the loop to ensure correct reception of the messages.</p>
申请公布号 EP0180299(A2) 申请公布日期 1986.05.07
申请号 EP19850305905 申请日期 1985.08.20
申请人 INTERNATIONAL COMPUTERS LIMITED 发明人 DESYLLAS, PETER LEO LAWRENCE;HOLT, NICHOLAS PETER;NAVEN, FINBAR
分类号 G06F15/173;H04L12/18;(IPC1-7):G06F13/42;G06F11/00;G06F15/16 主分类号 G06F15/173
代理机构 代理人
主权项
地址