| 发明名称 |
METHOD AND DEVICE FOR MINIMIZING DIGITAL-ANALOG CONVERTER COMPENSATING TRIM |
| 摘要 |
<p>A method and system for reducing the number of trims required to decrease the error function of a DAC below a specified range. The method includes the step of Walsh transforming the actual transfer characteristic of the DAC to generate a set of Walsh terms and fitting the Walsh terms to a straight line in the log domain.</p> |
| 申请公布号 |
JPS6187430(A) |
申请公布日期 |
1986.05.02 |
| 申请号 |
JP19850157086 |
申请日期 |
1985.07.18 |
| 申请人 |
FAIRCHILD CAMERA & INSTR CORP |
发明人 |
UIRIAMU JIEI AASHIERU;EDOUISU EI SUROON |
| 分类号 |
H03M1/74;H03M1/00;(IPC1-7):H03M1/10 |
主分类号 |
H03M1/74 |
| 代理机构 |
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代理人 |
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| 主权项 |
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| 地址 |
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