| 摘要 |
PURPOSE:To correct the wave even when a wave follows the final signal, which should be a constant frequency, at the factor on the way from the frequency conversion by using the first and second dividers. CONSTITUTION:The signal is a four-phase DPSK (QPSK) signal whose frequency is converted, namely, a signal immediately before demodulation and the signal, in which a frequency stabilizing degree is required in the severest way, is inputted to the first frequency divider 31 and divided. Further, the second frequency divider 32 reset at the same time point as the first divider is installed. As an input signal of the second divider 32, an oscillating signal of the first reference oscillating device 16 in the phase lock loop supplied to frequency conversion of the QPSK signal is used. A dividing ratio of the divider 31 is set so that control can be executed effectively for the frequency which will suppress fluctuation. To make a low frequency, for example, effectiveness better for the wave of several kHz orders of the output signal, the dividing ratio of the divider is made large. The voltage variable direction of a control part 38 is selected to the direction to suppress fluctuation of the final signal. |
