发明名称 MEMORY CONTROL DEVICE
摘要 PURPOSE:To prevent a memory control device from accessing to a failed memory part by storing the accumulated value of chip size values in respective words of a readable table memory on the basis of the high-order address of an output from an adder and adding the output of the memory to an input address signal by the adder. CONSTITUTION:Reading data from the table memory 1 is added to the input address signal from a central processor by the adder 3 to form and output a real memory address and the high-order address of the output is decoded by a decoder 2 to select the corresponding work from the memory 1. The accumulated value of the chip size values is stored in respective words of the memory 1 in every detection of an error from the diagnosis result in each chip size of the central processor is stored in respective words of the memory, so that the memory can be accessed by jumping a chip memory range including the failed position.
申请公布号 JPS6180342(A) 申请公布日期 1986.04.23
申请号 JP19840201279 申请日期 1984.09.26
申请人 NEC CORP 发明人 MASUMURA TAKASHI
分类号 G06F12/16;G06F11/00;G06F11/22 主分类号 G06F12/16
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