| 摘要 |
PURPOSE:To keep the quality of line even when a digital multiplex signal is interrupted by inserting the self synchronous type scramble circuit for a modulation input signal system of a large level signal and using a conventional signal processor for a modulation input signal system of a small level signal. CONSTITUTION:Four systems of digital multiplex signals 101-104 applying 16-value QAM modulation to a radio carrier are subject to scramble processing by using N-stage of PN code. A modulation input signal of a small level signal is given to a modulation circuit of a transmitter 3 via a conventional transmission signal processor 1 comprising of a code converting circuit 11, a transmission code processing circuit 12, a scramble circuit 13 and a scramble signal generating circuit 14. A modulation input signal being a large level signal is given to a modulation of a transmitter 3 via a transmission signal processor 2 provided with a code converting circuit 21, a transmission code processing circuit 22, a scramble (SCR) circuit 23, an SCR signal generating circuit 24, an input interruption detection circuit 25, a self-synchronous type SCR control circuit 27 and a self-synchronous SCR signal generating circuit 28. |
