| 摘要 |
A digital servo apparatus according to the present invention latches a count output of a counter (11) for counting reference clock signals in response to output of a speed detecting pulse from a speed detecting pulse generator (10a) in a latch circuit (141), thereby to latch the count output latched in the latch circuit (141) in another latch circuit (142) upon output of a subsequent speed detecting pulse. The digital servo apparatus further latches the count output of the counter (11) in a latch circuit (16) in response to output of a phase detecting pulse from a phase detecting pulse generator (10b). A comparator (15) compares difference between the count outputs latched in the latch circuits (141) and (142), so that the compared output difference and the count output latched in the latch circuit (16) are converted into analog signals to be sampled and held respectively thereby to produce a speed error signal and a phase error signal, which are added up to be supplied to a driving circuit (22). On the basis of the speed error signal and the phase error signal, the driving circuit (22) controls the speed and phase of a motor (10). Thus, only one counter (11) may be provided for producing the speed error signal and the phase error signal. |
