| 摘要 |
PURPOSE:To halve the management expenses for design, prototype and manufacture nearly by incorporating all components for both an independent synchronous system and a cascade synchronous system and changing the connection between the components so as to realize a speed converting circuit used both the systems. CONSTITUTION:A output 55 of a phase comparator changes in an equal period to that of a multiple signal timing pulse 51, the pulse 55 is fed to a voltage controlled oscillator, whose output is given to the 2nd clock terminal 20 so as to realize the cascade synchronous system speed converting circuit. Further, a flip-flop circuit 105 output '0' at staff as the result of the phase comparison 103 and '1' without staff respectively. As a result, the signal is assigned once per frame and the timing is indicated by a staff timing pulse 52. As to the multiplex signal timing, as the result of phase comparison, the execution of multiplex or not is controlled and then the staff synchronous circuit, that is, the independent synchronous system speed converting circuit is realized. |
