发明名称 SEMICONDUCTOR IC DEVICE
摘要 PURPOSE:To arbitrarily set the threshold voltage without causing the decrease in drain-source withstand voltage and the decrease in mobility by a method wherein the gate electrode of a MOS transistor is constructed of three layers: a poly Si layer containing a desired amount of impurity, a nitride film of high melting point metal, and a metal silicide layer. CONSTITUTION:Field oxide films 2, a gate oxide film 3, poly Si films 51 and 52 containing Br, a titanium nitride film (TiN film) 6, and an Si thin film 23 are formed on a P type Si substrate 1. Next, N type diffused layers 7, 7', and 7'' and N<+> type diffused layers 9, 9', and 9'' which serve as the source and drain and insulation films 8 of the gate side walls are formed. Next, Pt is adhered and silicified into PtSi layers 10, 10', 11 and 11'; finally, an Si oxide film 12 and Al wirings 13, 13', and 13'' are formed. Since the poly Si films 51 and 52 are not silicified in the presence of the TiN film 6, the threshold voltage of a FET can be arbitrarily set by adjusting the impurity concentration of the films 51 and 52. Further, this manner saves the introduction of an excess of impurity to the substrate surface; therefore, the decrease in source-drain withstand voltage does not occur.
申请公布号 JPS6165470(A) 申请公布日期 1986.04.04
申请号 JP19840186324 申请日期 1984.09.07
申请人 HITACHI LTD 发明人 HORIUCHI KATSUTADA;TANIDA YUJI
分类号 H01L21/8234;H01L27/088;H01L29/78 主分类号 H01L21/8234
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