| 摘要 |
PURPOSE:To attain high-speed frequency division and low current consumption by using a constant current source of a gate circuit for feedback signal control and one of constant current sources of the 1st stage D flip-flop in common in a frequency synthesizer of a radio receiver. CONSTITUTION:FETs T1/T1a, T2/T2a, T3/T3a whose sources are connected in common are connected as a step as it were and form a load transistor (TR) of a drive TRT4 connected to a signal input terminal 1. Then a common source of the FETT4/T4a is connected to a constant voltage source 11 via an FETTg for constant current source. A signal inputted to terminals 4, 5, 6 is inverted in its phase to a signal inputted to terminals 4a, 5a, 6a and when the FETT1 is turned on, the FETT1a is turned off. Through the constitution above, the circuit T4/T4a corresponding to a NOR gate circuit is connected directly to the constant current source 11 of the 1st stage D flip-flop and incorporated within the 1st stage D flip-flop, then the delay time in the NOR operation is reduced. |
