发明名称 RECTIFIED VOLTAGE MULTIPLIER CIRCUIT
摘要 PURPOSE:To control an output voltage by a simple configuration by composing rectifying means in combination of a plurality of rectifiers and a capacitor, and controlling a current flowed to the capacitor. CONSTITUTION:A plurality of diodes D1-D8 are connected in series between the midtap and the output terminal (o) of the seconary winding n2 of a transformer T, and capacitors C1-C8 are connected between one terminal of the secondary winding n2 and the prescribed connecting point of the diodes D1-D8. The voltage of the output terminal (o) is detected by resistors R1, R2 and a differential amplifier OP, a transistor Q is controlled by the detection output to control a current flowed to the capacitor C4.
申请公布号 JPS6146180(A) 申请公布日期 1986.03.06
申请号 JP19840167511 申请日期 1984.08.10
申请人 TOSHIBA CORP 发明人 TAKAMURA YOSHIO;NAKAJIMA HIROSHI
分类号 H02M7/10;(IPC1-7):H02M7/10 主分类号 H02M7/10
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