| 摘要 |
PURPOSE:To execute efficiently a function test, setting of internal initial data and reading of its result by carrying out continuously the reading and writing of data in parallel at a data memory element through the prescribed bus line from the outside in a data transfer mode. CONSTITUTION:In an integrated circuit 1, normal and data transfer modes are set. These action modes are specified by an FF46, an action mode specifying means. When the normal mode is specified, the circuit 1 executes the normal action. On the other hand, when the data transfer mode is specified, the reading and writing are continuously executed in parallel from the outside with respect to a data memory element (for instance, RAM20, a variety of latches in a control unit 21 and external memory 7) specified by a data transfer mode register 50, that is, an address specifying means, through I/O bus line which is not used in the normal mode. |
