Semiconductor switching device with reduced defect density.

摘要

In manufacturing a GTO, a silicon wafer is cut away along one of the crystal planes indicated by {100} in Miller indices, and the buried gate or the current channels are so arranged on the crystal plane that at least one longitudinal direction thereof is substantially parallel to at least one of axes indicated by <100> on condition that the inner product of the plane vector and the axis vector is zero. In the GTO thus manufactured, it is possible to minimize the crystal defect density on the crystal plane and thus to realize GTOs having uniform turned-on voltage, in particular, while increasing the controllable current markedly.