发明名称 |
Digital data receiver including timing adjustment circuit |
摘要 |
Digital Data receiving apparatus includes means for adjusting the timing of the sampling instants. A phase controlled oscillator (PCO 19) provides timing signals for sampling the received signal and is controlled, at the commencement of a received signal, by a timing initialization circuit (17) responsive to repetitive phase alterations in a training sequence. The timing initialization circuit (17) includes a plurality of Discrete Fourier Transform (DFT) circuits (23) responsive to frequencies dependent on the power spectral densities of the received signal, which received signal may be modulated at a normal rate or a fall-back rate. The DFT circuits (23) measure the correlation of locally-generated frequencies with the incoming samples for a predetermined number of such samples to produce a plurality of complex signals. A selector circuit (24) selects a pair of the complex signals dependent on the modulation rate. The provided pair of complex signals are multiplied in a complex conjugate multiplier (25) to produce a complex output signal which is fed to a phase segment detector (26) to provide a complex rotated signal. The complex rotated signal is converted in a phase-to-time-shift converter circuit (27) to a signal (m) for controlling the PCO 19.
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申请公布号 |
US4577334(A) |
申请公布日期 |
1986.03.18 |
申请号 |
US19840670425 |
申请日期 |
1984.11.09 |
申请人 |
NCR CORPORATION |
发明人 |
BOER, JAN;DIEPSTRATEN, WILHELMUS J. M. |
分类号 |
H04L27/227;H04L7/027;H04L7/10;H04L27/22;H04L27/38;(IPC1-7):H04L7/10 |
主分类号 |
H04L27/227 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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