发明名称 SEMICONDUCTOR MEMORY
摘要 <p>PURPOSE:To shorten the time required for writing of a semiconductor memory by dividing a memory cell array into a plurality of blocks and writing the same data into each block. CONSTITUTION:When CS of a control signal becomes L, MOS transistors Tx1, Tx2 and Ty1, Ty2 are turned off and MOS transistors Tx3, Tx4 and Ty3, Ty4 are turned on. Thereby, the most significant input signals Bxn, -Bxn and Bym, -Bym of X. and Y address decoder 12, 13 are respectively set at earthing potential. Under this condition, when the least significant X address Ax1 is changed to X address Xn-1 and the least significant Y adddress Ay1-1 is changed to Y address Ayn-1, all memory cells can be selected. At this time, a memory cell array is quadrisected and to each block of the memory cell arrays 11a-11d, the same data is written and accordingly the writing time can be shortened to 1/4.</p>
申请公布号 JPS6150296(A) 申请公布日期 1986.03.12
申请号 JP19840172743 申请日期 1984.08.20
申请人 TOSHIBA CORP 发明人 SATO KATSUHIKO
分类号 G11C11/413;G06F1/00;G06F1/24;G06F12/16;G11C7/00;G11C11/34;G11C11/401;G11C29/00;G11C29/34 主分类号 G11C11/413
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