| 摘要 |
PURPOSE:To contrive to improve the positional accuracy of diffused layers and gate electrodes by a method wherein a diffused layer is formed with a mask with a window larger than a gate electrode, then the mask is reduced to the electrode and covered with an insulation layer, and a metal is evaporated after removal of the mask. CONSTITUTION:An Si3N4 mask 3A is put on an N-epitaxial layer 2 on a semi- insulation GaAs substrate 1 more widely than the gate electrode, and a source 4 and a drain 5 are formed by ion implantation. Next, the mask 3A is reduced to the gate electode width by side-etching and thus formed into a mask 3B. The top surface of the mask 3B is exposed by flattening with a cover of an insulation layer 6. Then, the mask 3B is etched away by putting resist 7 having a window corresponding to the mask 3B. Finally, a gate electrode 9 is formed on the trace of the mask 3B by evaporating a metal 8, and the metal 8 is lifted off with the resist 7. This construction increases the accuracy of the relative positioning of the diffused layer to the gate electrode and yields the FET of much more uniform characteristic. |
