| 摘要 |
A memory array is provided which includes a common sense line to which is connected a first storage capacitor through first switching means and a second storage capacitor through second switching means, with a common word line connected to the control electrodes of the first and second switching means, a first bit line connected to a plate of the first storage capacitor and a second bit line connected to a plate of the second storage capacitor. Data is stored into or read from the first storage capacitor by selecting the common word line and the first bit line and data is stored into and read from the second storage capacitor by selecting the common word line and the second bit line, with the data from both storage capacitors being detected on the common sense line.
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