发明名称 Buffer storage system for data processing
摘要 The operand access address in the buffer storage (2) is set in an operand effective address register (1). The related operand store data, if that address exists in the buffer storage, is written to the buffer storage (2). Simultaneously the operand store address is sent from the register (1) to one of the store address registers (9). If the related store address is not in the operand access buffer storage, then the data is set in one of the store data buffer registers (10) and a byte mark is written to a corresponding byte work register (BMR). Subsequently, a request for a main store write is generated. - An address set in a store address buffer register is fed back to the instruction effective address register (4). If the related address exists in the instruction fetch buffer storage (5) then operand store data set in a store data buffer register (10) is fed back to the instruction store data register (8). Operand store data are then written to the instruction fetch buffer storage (5).
申请公布号 ES8602285(A1) 申请公布日期 1986.03.01
申请号 ES19270005383 申请日期 1984.12.06
申请人 FUJITSU LIMITED 发明人
分类号 G06F9/38;G06F12/08;(IPC1-7):G11C8/00;G11C15/00 主分类号 G06F9/38
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