摘要 |
PURPOSE:To attain parallel multiplication of a vector element and to shorten operation time by preparing a multiplier composed of a multiplying circuit for a vector degree and an adding circuit for a degree subtracted by 1. CONSTITUTION:Vector elements a1-an are latched to a register group 13 of a calculating part 12 which calculates a vector and an inner product with the vector and vector elements b1-bn are latched to a register group 14. The respective vectors a1-an and b1-bn are multified by a multiplying circuit group 15, and multiplied results are latched to a register group 16. The circuit group 15 is parallelly multiplied, the multiplying results latched to the register group 16 are added to an adding circuit group, a sum of the multiplying results is operated and added to a register 18. The calculating part 12 is composed of the adding circuit for a vector degree and an adding circuit for a degree, subtracted by 1 vector elements are parallelly multiplied and the operation time is shortened when a vector degree is increased. |