发明名称 Supply voltage level independent clock generator
摘要 A clock generator (21) for use in a random access memory includes a delay circuit (35) for delaying an input signal for a predetermined time, independent of supply voltage level. The generator (21) includes a driver circuit (34) responsive to the delayed input signal and at least one constant-resistance transistor (48, 50). The transistor (48, 50) has a control electrode supplied with a predetermined constant voltage independent of the power supply voltage for providing a high ON resistance that is also independent of the power supply voltage. Through operation of the constant-resistance transistor (48, 50) the delay time of the delay circuit (35) and thus the clock signal is made independent of any variation in the power supply voltage.
申请公布号 US4571503(A) 申请公布日期 1986.02.18
申请号 US19830502597 申请日期 1983.06.09
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 TOBITA, YOUICHI
分类号 H03K5/13;G06F1/06;H03K5/02;H03K5/135;(IPC1-7):H03K5/135;H03K3/33;H03K17/284;H03K17/693 主分类号 H03K5/13
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