发明名称 |
Semiconductor read only memory device with improved access time |
摘要 |
A semiconductor memory device in which the differential amplifier circuit compares a potential of a bit line to which memory cells storing information are connected with a reference potential of a dummy line to which a dummy cell is connected, and detects information stored in each of the memory cells. The semiconductor memory device comprises a circuit which discharges both the bit line and the dummy line to a low potential when the chip enable inverted signal is supplied. When the chip enable signal is supplied, therefore, the differential amplifier circuit can detect a difference between the bit line potential and the dummy line potential before the bit line is fully charged up. This makes it possible to produce the chip enable access time and to realize higher speed operations.
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申请公布号 |
US4692902(A) |
申请公布日期 |
1987.09.08 |
申请号 |
US19840654215 |
申请日期 |
1984.09.25 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
TANAKA, SUMIO;SAITO, SHINJI;ATSUMI, SHIGERU |
分类号 |
G11C17/00;G11C7/06;G11C7/12;G11C7/14;G11C8/18;G11C16/06;H01L27/10;(IPC1-7):G11C7/00 |
主分类号 |
G11C17/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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