| 摘要 |
The collectors of a first transistor and a second transistor (T1, T2), which are arranged as a differential pair, are each connected to a load resistor (R0) and to the base of a third transistor and a fourth transistor (T3, T4), respectively, which are arranged as emitter followers. In order to obtain a low dissipation for a specific gain and bandwidth the collector of the third transistor (T3) is coupled to a tapping (7) on the load resistor (R0) of the second transistor (T2) and the collector of the fourth transistor (T4) is coupled to a tapping (6) on the load resistor (R0) of the first transistor (T1).
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