发明名称 VERTICAL SYNCHRONIZING PULSE GENERATOR
摘要 PURPOSE:To produce a vertical synchronizing pulse which excels in the noise resistance by discriminating a synchronous or an asynchronous state and then giving inversion or non-inversion to a T type FF based on the result of said discrimination. CONSTITUTION:It is supposed that the signals given from a frequency separating circuit 15 are vertically synchronous in case both inputs of an OR gate 22 are set at L levels. Thus these signals are regarded as synchronizing signals. Then the trigger is applied to a T type FF through the gate 22. As a result, an FF23 is inverted with its output Q changed to an H level from an L level. Otherwise it is considered that the signal is a noise and the output of the gate 22 kept at an H level. Thus the FF23 is not triggered with no change produced to the Q output state. In such a way, a vertical synchronizing pulse which excels in the noise resistance can be obtained through an output terminal 14.
申请公布号 JPS6113773(A) 申请公布日期 1986.01.22
申请号 JP19840133051 申请日期 1984.06.29
申请人 PIONEER KK 发明人 ARAKI MORIO
分类号 H04N5/06;H04N5/08 主分类号 H04N5/06
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