| 摘要 |
<p>PURPOSE:To perform a simple test in a production stage at a high speed by reading sequentially data of a memory cell array with the aid of a control signal input so as to accumulate the data in terms of a chip of read only memory, generating data for deciding the coincidence or dissidence of the accumulated value and preset expected value data and outputting it outside the chip. CONSTITUTION:By setting a wafer test mode, an accumulator 8, comparison deciding circuit 9 and expected value data holding circuit 10 are initialized, and simultaneously their action timing is controlled. This expected value data holding circuit 10 holds expected value data used as a comparison reference with respect to accumulated values of respective data in the prescribed area of the memory cell array. The accumulator 8 executes the accumulation processing of ROM read data from an output data detection circuit 4. The comparison deciding circuit 9 compares the accumulated output from the accumulator 8 with the output held by the expected value data holding circuit 10 at the prescribed timing, decides whether or not contents of both outputs are coincident, and outputs the decided data in accordance with the coincidence or dissidence of the decided result.</p> |
