| 摘要 |
PURPOSE:To provide a semiconductor implanted and integrated logic circuit (IIL) with low power consumption and high speed while minimizing the loss in current externally supplied for an injector by a method wherein the IIL utilizing a junction type field effect transistor (J-FET) as an injector and a high withstand voltage linear transistor are jointly provided on a substrate. CONSTITUTION:An N-channel J-FETT1 and a reverse directional and longitudinal NPN transistor TR are formed on the first island region 10. Then a drain electrode 31 and a source electrode 32 of J-FETT1 are respectively connected to an injector terminal 1 and a base electrode 33 of said transistor TR, while a gate is grounded through the intermediary of a substrate 1 and the J-FETT1 is utilized as a gate ground type constant current circuit. Besides, the base electrodes 33, collector electrodes 34 and an emitter electrode 35 of said transistor TR are respectively connected to a base terminal B, output terminals C1, C2 and a ground line GND to compose an IIL. On the other hand, a high withstand voltage linear transistor TD utilized for a linear circuit or a high withstand voltage driver circuit etc. may be formed on the second island region 20 to be provided with a base electrode 36, an emitter electrode 37 and a collector electrode 38. |
