| 摘要 |
<p>A data interface circuit (33) for interfacing between an asynchronous data source providing data in start/stop format and a synchronous data communication channel (34, 35). The data interface circuit (33) has a transmit portion (41) and a receive portion (42) which function independently. Upon receipt of asynchronous data, the transmit portion (41) strips start and stop bits from the data and transmits the data in data frames of variable length chararcterized by beginning and ending with synchronizing idle codes. The synchronizing idle codes are transmitted in the absence of data to maintain synchronization. A code circuit (71) insures that a data word is never the same as the idle code. Similarly, upon receipt of synchronous data and idle codes, the receive portion (42) stores the data and controllably adds start and stop bits. Data in start/stop format is asynchronously provided at an output of the receive portion (42).</p> |
