| 摘要 |
PURPOSE:To accurately detect an abnormality generating position in the interior of an integrated circuit device even in a state that the sealing cap body is being adhered on the device by a method wherein conductor patterns not being directly connected electrically with the terminal pins of the substrate and exposed conductor pads connected electrically with the conductor patterns are formed. CONSTITUTION:Conductor patterns 2 are formed on the surface layer part 1a and the internal layer part 1b of a ceramic multilayer substrate 1. Exposed conductor pads 7 are formed on the side of the face of one side of this substrate 1, whereon IC chips 4 are not mounted, in such a way as to array in a lattice type. These pads 7 are electrically connected with the conductor patterns 2, which are not directly connected electrically with the terminal pins 3 of the substrate 1. According to this constitution, when abnormality is perceived in the interior of the IC device, a measurement of the voltage value, the resistance and so forth in each position of the patterns 2 in the interior is performed through the pads 7 before a sealing cap body 6 is dismantled, thereby enabling to accurately grasp the abnormality generating position. |
