| 摘要 |
<p>PURPOSE:To obtain a synchronous control system where data reception is synchronized surely without load of software or the like with simple constitution by receiving data only during data reception permission. CONSTITUTION:A reception RM is inputted to a shift register 10, a signal 18 is inputted to a shift clock terminal of the register 10 and an input level of the reception RM for 3 clocks' share of the signal 18 is stored at QA-QC outputs. A JF/F13 is set by using the signal 18 when the output of the register 10 is all at L level and reset by the signal when all at H level. A one-shot multivibrator 14 gives an output for a prescribed time at the reset of the JF/F13 and the output is inputted to a clock terminal of a DF/F15. A Q' output of the JF/F13 is inputted to a terminal D of the DF/F15. The DF/F15 is set as soon as the output of the one-shot multivibrator 14 descends, an AND gate 16 is set and an RM output reaches the same level as the reception RM.</p> |
