| 发明名称 |
DATA MEMORY ARRAY DEVICE AND SAMPLING METHOD FOR ANALOG SIGNAL SAMPLE VALUE |
| 摘要 |
A high speed data storage array is disclosed utilizing a cell design allowing high speed sampling of a rapidly changing signal. Each cell of the array includes two input gates (Q1, Q2) between the signal input and a storage capacitor (20). The gates are controlled by a high speed row clock (12) and low speed column clock (28) the instantaneous analog value of the signal being sampled and stored by a cell on coincidence of the two clocks. |
| 申请公布号 |
JPS615499(A) |
申请公布日期 |
1986.01.11 |
| 申请号 |
JP19850069877 |
申请日期 |
1985.04.02 |
| 申请人 |
BOARD OF TRUSTEES OF LELAND STANFORD JR UNIV:THE |
发明人 |
JIEIMUZU TEI UOOKAA;AARU ESU RAASEN;SUCHIIBUN ERU SHIYAPIRO;SOO IKU CHIYAI;DEIITORITSUHI AARU FUREITAGU;MAACHIN BURIIDENBATSUHA |
| 分类号 |
G11C27/00;G11C27/02;G11C27/04 |
主分类号 |
G11C27/00 |
| 代理机构 |
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