Digital circuit extracting synchronism signals from a serial flow of coded data.

摘要

The digital circuit extracts synchronism signals from a serial flow of coded data according to a process which uses a phaselocked loop where the different level transitions of the signal received are separately considered and a phase is determined for each type, the latter being compared with a specific reference phase, established in the initialization step.

The error signal obtained from the comparison is used for correcting synchronism signal frequency.