| 摘要 |
A distorted digital signal is restored using a reference signal derived by combining the rectified positive and the negative distorted digital signal cycles. The distorted signal is received at an input terminal. The positive and negative voltages are rectified and sampled by FET transistors gated by the output of a D-type flip- flop, which holds the signal output. Two capacitors, which store the sampled positive and negative voltages, are used to provide the reference voltages. The comparator outputs are held by the flip-flop for the respective period, and are synchronized with the original digital signal.
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