发明名称 Buried-gate structure-type semiconductor switching device.
摘要 <p>In manufacturing a GTO, a silicon wafer is cut away along one of the crystal planes indicated by (n11) in Miller- indices, and the burried gate or the current channels are so arranged on the crystal plane that at least one longitudinal direction thereof is substantially in parallel with at least one of axes indicated by (2nn) on condition that the inner product of the plane vector and the axis vector is zero. In the GTO thus manufactured, it is possible to minimize the crystal defect density on the crystal plane and thus to realize the GTOs having uniform turned-on voltage, in particular, while increasing the controllable current markedly.</p>
申请公布号 EP0165419(A2) 申请公布日期 1985.12.27
申请号 EP19850105410 申请日期 1985.05.03
申请人 KABUSHIKI KAISHA MEIDENSHA 发明人 HAYASHI, YASUHIDE;KAWAMURA, TAKAYASU
分类号 H01L29/74;H01L29/04;H01L29/10;H01L29/744;H01L29/78;(IPC1-7):H01L29/74;H01L29/80 主分类号 H01L29/74
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