| 摘要 |
PURPOSE:To obtain an LSI structure that can be applied to the design of a controller of an external input/output device having high performance and a high function, by forming a hierarchical processor within an LSI and adapting an ROM and a finite state transition machine to host and subordinate processors respectively. CONSTITUTION:The control function of an external input/output device 201 for common application is shared and executed by >=1 state machines FSM. An FSM1 which performs reception control on a transmission clock psi'. When data are transferred between a host system and the device 201, a data buffer 204 is provided in a control LSI in case the transfer speeds are different between the hose system and the device 201 or the time is needed for preparation of data transfer. Furthermore, a connection port of the FSM is standardized since the FSM can be added for each control function of the device 201. A microprogram controller muC has a function to allocate the start sequence. Thus an on-chip hierarchical processor structure is secured to define the muC and the FSM as the host and subordinate processors respectively.
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