发明名称 TIMING SIGNAL SELECTING SYSTEM
摘要 <p>PURPOSE:To select a timing signal efficiently, highly reliably and flexibly by supplying a gate control signal determined in accordance with selecting information written in a selecting signal storage means to a gate circuit and supplying a required timing signal from the gate circuit to its using device. CONSTITUTION:To select and output one optional timing signal out of four kinds of timing signals e.g., selecting information D1, D2 corresponding to the timing signal to be selected are supplied from a microprocessor to a flip-flop (FF) circuit 3 through data lines 4, 5 on the basis of the execution of a writing instruction and a writing clock is simultaneously supplied to the circuit 3 through a clock line 6 to store the selecting information in the circuit 3. The stored selecting information A, B are outputted from the circuit 3 to lines 7, 8 and a decoder 2 receiving these output information A, B turns only one gate control signal out of four signals G1-G4 on its output lines 9-12 to the low level and turns other signals to the high level.</p>
申请公布号 JPS60254309(A) 申请公布日期 1985.12.16
申请号 JP19840111299 申请日期 1984.05.31
申请人 FUJITSU KK 发明人 KATOU MASARU;SATOU TATSUO
分类号 G06F1/08;G06F1/04;H04Q11/04 主分类号 G06F1/08
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