发明名称 VECTOR DATA PROCESSOR
摘要 PURPOSE:To improve the executing performance of a vector data processor by using a control circuit that secures the use of an idle access pipeline as long as an access instruction having the same ID value on the access pipeline is not under an execution mode. CONSTITUTION:A main memory 10 is connected to a vector unit 21 and a scalar unit 23 via a main memory controller 11. A mask register 213 holds the mask data related to the specific data arithmetic among vector data. The arithmetic of said mask data is carried out through a mask pipeline 214, and the four rules of arithmetic are carried out by each pipeline 214 among vector instructions. While an access instruction is carried out by an access pipeline 211. Here a pipeline discriminator is provided as an operand of the access instruction. Then an idle pipeline is used when an instruction having a pipeline discriminator having the same value as the pipeline discriminator of the access instruction to be executed is not executed.
申请公布号 JPS60254277(A) 申请公布日期 1985.12.14
申请号 JP19840111218 申请日期 1984.05.31
申请人 FUJITSU KK 发明人 FUJI MASAYUKI
分类号 G06F9/38;G06F15/78;G06F17/16 主分类号 G06F9/38
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