发明名称
摘要 A cell for a semiconductor memory of the static type employs only one conventional MOS transistor, along with a field implanted resistance and a vertical P-channel junction-type field effect transistor. These elements, along with a resistor element which may be another field implanted resistance or a polysilicon implanted resistance, provide a circuit which is stable with either a "1" or "0" stored. No clock or other refresh circuitry is needed.
申请公布号 JPS6056311(B2) 申请公布日期 1985.12.09
申请号 JP19780002312 申请日期 1978.01.12
申请人 TEXAS INSTRUMENTS INC 发明人 DEBITSUDO JEI MATSUKUERUROI
分类号 G11C11/41;G11C11/39;G11C11/412;H01L21/822;H01L21/8244;H01L27/04;H01L27/10;H01L27/11;H03K3/356 主分类号 G11C11/41
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