发明名称 FORMATION OF INTERLAYER INSULATION FILM
摘要 PURPOSE:To flatten the surface of the title film on a wiring by a method wherein the first insulation film produced on the lower layer wiring by CVD is etched back, and the second insulation film by spincoating is formed on the uneven surface this etch-back. CONSTITUTION:After the lower layer Al wiring 3 is formed on a single crystal Si substrate 2 with an SiO2 film 1 produced on the surface, a CVD SiO2 film 4 is formed. The surface is flattened by being coated with a resist 6, and then the surface of the Al wiring 3 is exposed by etching back through RIE. A recess 5' located in the surface of the SiO2 film 4 is filled with the solution of SOG or polyimide series resin by spin-coating, and a thin insulation film 13 flattened in the surface so as to remove its unevenness is formed. Next, a PSG film 14 is formed by CVD and the insulation film 13 and the PSG film 14 are brought into about the same film thickness as that of a CVD PCG film 7. Then, the upper layer Al wiring 16' is formed. This manner can flatten the surface by compensating for the uneven surface and the variability in the surface shape and can prevent disconnection without step cuts even in the presence of the upper layer wiring above.
申请公布号 JPS60245254(A) 申请公布日期 1985.12.05
申请号 JP19840100476 申请日期 1984.05.21
申请人 HITACHI SEISAKUSHO KK 发明人 TAKEDA TOSHIFUMI;YOSHIMI TAKEO
分类号 H01L21/768;H01L21/31 主分类号 H01L21/768
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