| 摘要 |
PURPOSE:To correlate the titled circuit with a bias setting circuit, to eliminate the dispersion of hFE and to operate the titled circuit at an optimum operating point at all times by connecting a base consisting of one part of an n(p) type seicomductor layer in a pnp(npn) transistor at one end on the other section of the n(p) type semiconductor layer and connecting the other end on the other section of the n(p) type semiconductor layer to a substrate and using the other end on the other section of the semiconductor layer as a bias resistor. CONSTITUTION:A base consisting of one part of an n(p) type epitaxial semiconductor layer shaped on a p(n) type semiconductor substrate is connected to the other section of the base n(p) type semiconductor layer in a pnp(npn) transistor in which the substrate is used as a collector, one part of the n(p) type eiptaxial semiconductor layer is employed as the base and a p(n) type diffusion region formed to the semiconductor layer is used as an emitter, the substrate is connected to the other section of the n(p) type semiconductor layer, and the n(p) type semiconductor layer is grounded and employed as a bias resistor. The base of the pnp transistor such as a substrate pnp transistor, in which a p type substrate 1 is used as the collector, an n type EP layer 2a as the base and a p<+> diffusion region 3 as the emitter, is connected to another n type EP layer 2b separated by a p<+> type isolation section 5 through an aluminum wiring 6, and the n type EP layer 2b is employed as the bias resistor REP and another end is connected to the intermediate section (GND) of the substrate side. |
