发明名称 MOUNTING SUBSTRATE WAFER, MULTILAYER CERAMIC SUBSTRATE, MOUNTING SUBSTRATE, CHIP MODULE, AND MOUNTING SUBSTRATE WAFER MANUFACTURING METHOD
摘要 A wafer for mounting substrates according to the present disclosure includes a multilayer ceramic substrate including top face electrodes, bottom face electrodes, and internal electrodes providing connection between the top face electrodes and the bottom face electrodes, and a wiring pattern formed on a top face of the multilayer ceramic substrate. The wiring pattern has a minimum line width which is equal to or less than 2 µm and a minimum line space which is equal to or less than 2 µ m. When the wafer for mounting substrates is zoned into a plurality of regions by the units of 20 mm x 20 mm, at least 50% of the regions satisfy the condition that an SFQR in 20 mm x 20 mm evaluation region be equal to or less than 2 µm, at the top face of the multilayer ceramic substrate.
申请公布号 EP3041046(A1) 申请公布日期 2016.07.06
申请号 EP20140841323 申请日期 2014.08.25
申请人 HITACHI METALS, LTD. 发明人 NAGATOMO HIROYUKI;MASUKAWA JUNICHI
分类号 H01L23/15;H01L21/48;H01L23/498 主分类号 H01L23/15
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