发明名称 DATA PROCESSOR
摘要 PURPOSE:To simplify the constitution of an arithmetic controlling section, by doubling part of a control storage and selecting one of the doubled part in accordance with calculated results. CONSTITUTION:When a control address MA is ''A'', both the 1st and 2nd storage devices 1 and 2 are accessed and each microinstruction is read out, and then, ''a'' is ouputted from the 1st storage device 1. Since the SELC field of a microinstruction related to the control of a multiplexer 4 is usually ''0'', the multiplexer 4 selectes the 1st control storage 1 and makes outputs and the ''a'' is fetched and executed by a microinstruction register 5 by means of a clock. In the example shown in the figure, the 2nd control storage 2 is selected since the least signification bit of the calculated results of the microinstruction (a) is ''0'' and the microinstruction (a) is fetched by the microinstruction register 5 and executed. As a result of the execution, a control address C is generated.
申请公布号 JPS60238932(A) 申请公布日期 1985.11.27
申请号 JP19840095179 申请日期 1984.05.11
申请人 NIPPON DENKI KK 发明人 HORIKAWA AKINORI
分类号 G06F9/22 主分类号 G06F9/22
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