发明名称 REDUNDANT CIRCUIT OF SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE:To facilitate a layout of link elements and to ease requirements such as positioning accuracy of a cutting laser beam by providing cutting link elements on an output line and disposing a clamp transistor at the word line side. CONSTITUTION:When memory cells linking with word lines WLL(n), WLL(n+1), WLR(n) and WLR(n+1) of memories having normal and redundant memories are defective, link elements 1A and 1B of an output line are out due to laser beams. A precharge of the word lines is not executed by a precharge transistor 4, and the memory cell will not be selected. In this case, nodes N1 and N2 are not in the floating condition due to transistor 3A and 3B provided at the word line side with respect to the elements 1A and 1B, and the occurrence of malfunction can be prevented. The titled device is constituted in such a way that link elements are not provided on an address line of the row decoder circuit, etc., and the number of link elements is reduced. Furthermore a layout can be facilitated, and requirements such as positioning accuracy of cutting laser beams can be eased.
申请公布号 JPS60236200(A) 申请公布日期 1985.11.22
申请号 JP19840094885 申请日期 1984.05.09
申请人 MITSUBISHI DENKI KK 发明人 TERADA YASUSHI;MIYATAKE HIDEJI;NAKAYAMA TAKESHI
分类号 G11C11/413;G11C11/34;G11C29/00;G11C29/04 主分类号 G11C11/413
代理机构 代理人
主权项
地址