发明名称 PRODUCTION OF INTEGRATED CIRCUIT
摘要 PURPOSE:To prevent a wire from being disconnected by difference in level, by depositing a first metallic layer so as to contain an aperture of an insulation layer and by depositing a second metallic layer after etching the first layer witha corrosion-resisting film provided on an aperture. CONSTITUTION:An aperture 5 is formed in an insulation layer 3 of an MOS semiconductor element so as to pass through the same and to reach a poly-Si layer 4 and a diffusion layer 2. A first metallic layer 6 is then vapor deposited thereon. A corrosion-resisting film 7 is selectively formed in a recess in the metallic layer 6 corresponding to the aperture 5, and the metallic layer 6 is then etched away. Thus the metallic layer 6' is left in the aperture 5 only and the upper surface of the aperture is flattened. After removing the corrosion-resisting layer 7, a second metallic film 8 is deposited thereon. According to this method, disconnecting of a wire, which would be caused by difference in level, is completely eliminated.
申请公布号 JPS60227441(A) 申请公布日期 1985.11.12
申请号 JP19840084557 申请日期 1984.04.26
申请人 TOPPAN INSATSU KK 发明人 HIRAGA NORIAKI
分类号 H01L21/3205;(IPC1-7):H01L21/88 主分类号 H01L21/3205
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