发明名称 INTEGRATED CIRCUIT PACKAGE
摘要 A low cost injection-molded plastic pin grid array chip carrier is provided as an alternative to a ceramic pin grid array chip carrier, in which an electrically superior package is fabricated by supporting nested lead frames in the mold cavity at the centers of the lead frames through the provision of a central carrier for each of the nested lead frames, with the central carrier permitting a one shot molding process. In one embodiment the lead frames include square toroidal central carriers, with one set of nested lead frames being provided with offset leads such that all leads lie in the same plane in the package. Path resistance is lower than the ceramic pin grid array chip carrier because of the use of a copper lead frame as opposed to the sputtered tungsten used in ceramic packages. Interlead resistance is increased through the utilization of conical or pyramidal supports for the pins which lengthens the resistance paths between the leads. Due to the lower dielectric constant of plastic, the interlead capacitance is significantly reduced to permit higher speed operation and reduced cross-talk. The subject plastic pin grid array chip carrier is also electrically superior to a conventional glass epoxy package and can be produced at a fraction of the cost.
申请公布号 JPS60227457(A) 申请公布日期 1985.11.12
申请号 JP19850040963 申请日期 1985.03.01
申请人 OOGATSUTO INC 发明人 RICHIYAADO MIYUURINGU
分类号 H01L23/50;H01L21/48;H01L21/56;H01L23/28;H01L23/495;H01L23/498 主分类号 H01L23/50
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