| 摘要 |
<p>An encoder system which provides non-power of two, unambiguous, even counts, the system having a modular configuration to permit a substantial portion of the system to comprise standardized modules, wherein modifications to a minimum of modules provide a wide range of different system counts, the system utilizing a truncated, symmetric, unit step code sequence and a division of processing functions among modules which permits the user to select among system outputs having a number of different processing levels.</p> |
