发明名称 LOGICAL INPUT CIRCUIT
摘要 PURPOSE:To simplify the titled circuit and to reduce the cost by constituting a switching logical circuit having priority with an I<2>L circuit so that a channel or the like is not selected at the same time. CONSTITUTION:An input Vcc is converted into the logic level of the I<2>L circuit is converted into the logical level of the I<2>L circuit by connecting input changeover switches 1, 2, 3 for a television channel or the like to inverters 16, 17, 18 respectively via NPN transistors 13, 14, 15 and a signal of logic level of each I<2>L circuit is fed to a priority circuit S constituted by applying wired- AND connection to the I<2>L inverters 19, 20, 21 of the next stage to obtain a priority selection signal. If the switch 1 is turned on (1) at first, an output of the inverter 16 goes also to logic ''1'', the output of the inverter 19 goes from logical ''1'' to logical ''0'', and an output of logical ''1'' is obtained at the inverter 22, and since the output of the inverters 17, 18 is fixed to logical ''0'' at the same time, the level of the other channels is at logical ''0'' and not selected.
申请公布号 JPS60226214(A) 申请公布日期 1985.11.11
申请号 JP19840082034 申请日期 1984.04.25
申请人 HITACHI SEISAKUSHO KK 发明人 TAKAHASHI SATOSHI
分类号 H03K19/0175;H03K19/091;H03K19/20 主分类号 H03K19/0175
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