发明名称 SEMICONDUTOR DEVICE
摘要 PURPOSE:To enable the removal of the following resistance from a memory cell by a method wherein a high-resistance connecting the collector of a trasistor (Tr) to the emitter is formed of the base region. CONSTITUTION:A low-specific-resistance N type buried layer N<+>BL and a high- specific-resistance N type epitaxial layer N-EP form the collectors of Trs Q0, Q0', and it also acts as the base of a P-N-P TrQ3. The P<+> region connected to the X terminal and the P<+> region connected to the B terminal are connected with a P<-> region forming the high-resistance RC1. Both the P<+> regions connected to the X and B terminals act as the emitter and the collector of the TrQ3, respectively. Such a construction enables the substantial removal of high-resistance from a memory cell circuit and can reduce the occupation area of a chip.
申请公布号 JPS60216575(A) 申请公布日期 1985.10.30
申请号 JP19850009042 申请日期 1985.01.23
申请人 HITACHI SEISAKUSHO KK 发明人 HOTSUTA ATSUO;KATOU YUKIO
分类号 G11C11/411;H01L21/8222;H01L21/8229;H01L27/082;H01L27/10;H01L27/102 主分类号 G11C11/411
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