| 摘要 |
<p>PURPOSE:To reduce current consumption in a memory part by applying a signal to read out the contents of a memory to the gate of a load FET and connecting latch circuits synchronized with a reading signal to a reading line. CONSTITUTION:Writing is executed by connecting the drains of MOSFETs Q1, Q4 as memory elements to data lines D1, D2. To read out the contents of a memory to a word line W2, the line W2 is turned to the H level, a word line W1 is turned to the L level and a reading signal terminal READ is turned to the H level. Consequently, p-MOSFETs Q5, Q6 as load elements are turned on, signals to the data input terminals D of latch circuits LAT1, 2 are sent from the output terminals Q, an memory output terminal O1 is turned to the H level similarly to the data line D1 and an memory output terminal O2 is tutned to the L level similarly to the data line D2, so that the contents of the memory are read out. When a reading signal terminal READ is turned to the L level, the Q5 and Q6 are cut off and the data are held in the latches LAT1, 2.</p> |
