| 摘要 |
<p>PURPOSE:To obtain secure and stable operation by directly inputting the output of NAND circuit to the gate of N channel transister (N-Tr) which composes of the inverter, and through the transfer gate to the P channel transister (p-Tr). CONSTITUTION:When the output of NAND gate becomes '1', the potential Vcc of output node N1 is directly impressed to the gate of N-TrQ 9 of an invert er 35, and Q9 is immediately turned on and the output node N5 of the inverter 35 begins to trail. The output of the NAND circuit 31 is transmitted to the node N11 through the transfer gate 33, and when the potential of the output node N5 trails down to SW-VTH, the output stabilizing circuit is turned on, and the node 11 rapidly rise up towards the SW potential, and P-TrQ 8 of the inverter 35 is turned off, and the node 5 is stabilized at '0'. So, it does not happen that the output of the inverter is unstable until the node 11 rises up to Vcc-VTH.</p> |
