发明名称 DISPOSICION DE CIRCUITO LOGICO Y DE SEGURIDAD INTRINSECA
摘要 <p>The invention involves an "AND" logic circuit with built-in safety comprising a first and a second input to which pulses can be applied, and respectively tied to the base of a first and a second transistor (1,2) each having a collector to which a reference voltage (5) is applied by means of a corresponding resistance (6,7), and comprising, in addition, a third transistor (3) having its base tied to ground by means of the secondary winding (15) of a transformer whose transforming ratio is less than unity, its collector tied to the positive terminal of the d.c. voltage supply by means of a resistance (13), and its emitter having the reference voltage (5) applied thereto. According to the invention, the first transistor (1) has its emitter tied by means of a first diode (8) and its collector tied by means of a capacitor (9) to ground, whereas the second transistor (2) has its emitter directly tied and its collector tied by means of a branch comprising a capacitor (10) and a second diode (11) in series to ground. The anode of the first diode (8) and the cathode of the second diode (11) are tied to ground.</p>
申请公布号 ES536693(D0) 申请公布日期 1985.10.16
申请号 ES19930005366 申请日期 1984.10.11
申请人 JEUMONT-SCHNEIDER 发明人
分类号 H03K19/007;(IPC1-7):H03K19/007;B61L1/20 主分类号 H03K19/007
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