ERROR RATE DETECTION SYSTEM

摘要

PURPOSE:To attain more accurate error rate detection by setting a signal inserted to a specific time slot to a prescribed level except the highest level and the lowest level to detect an error in which the amplitude is increased. CONSTITUTION:When a frame detection pulse FD is inputted to a frame protection circuit 2 in a prescribed period for a prescribed number of times continuously, the circuit 2 discriminates that the timing is a timing of a correct frame slot and enters the synchronous state and outputs a frame pulse FP in the frame slot timing during the synchronous state. A error counter circuit 3 counts the state that no frame detection pulse FD is outputted from a frame detection circuit 1 when the frame pulse FP is outputted from the frame protection circuit 2. A frame counter circuit 4 counts the frame detection pulse FD. An error rate discrimination circuit 5 calculates an error rate from the count of the error counter circuit 3 and the count of the frame count circuit 4 and outputs an alarm signal ALM when the rate is a prescribed value or over.