| 摘要 |
PURPOSE:To make the titled circuit suitable for semiconductor circuit integration without generating malfunction due to noise by using a noise eliminating circuit, a trailing edge detecting circuit, a counter and a vertical synchronizing signal generating circuit and applying digital processing to a composite synchronizing signal so as to detect a vertical synchronizing signal. CONSTITUTION:When the composite synchronizing signal is inputted to the noise eliminating circuit 102 via an input terminal 101, a part of the noise is eliminated by the circuit 102 and the result is given to the trailing edge detecting circuit 104. The circuit 104 detects a trailing edge pulse of the composite synchronizing signal and its output is outputted to a control circuit 106. On the other hand, the composite synchronizing signal eliminated with noise is fed to the circuit 106 from the circuit 102. The circuit 106 resets the counter 115, measures the position of the trailing edge pulse by output signals 108-114 of the counter 115 so as to detect a horizontal synchronizing signal, an equivalent pulse and the vertical synchronizing signal, the counter 115 and the composite synchronizing signal are synchronized and the vertical synchronizing signal is generated (117).
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